application note effective filtering of tde1707 by ugo morriconi the tde1707 is an industrial i.p.s. (intelligent power switch). dedicated to proximity detectors, it can deliver up to 0.5 a to a oconfigurableo load (load to battery or load to ground configuration); see block diagram fig.1. on the application circuit (fig. 2) of the tde1707 data-sheet, the use of filter capacitors is recom- mended on both :- - the power supply (+vs pin 7). - the +5 v regulated voltage (vreg pin 6). # to understand the function of the vreg ca- pacitor, it is necessary to consider that the vreg pin makes available a regulated voltage that can be used to supply external circuits (typically proximity detectors); but the tde1707 itself, always uses the vreg to sup- ply most of its internal circuits (see fig.1). internally to the tde1707, vreg supplies all the functional blocks, except the output power transistor (and the driver-led, when the led is connected as in oload to gnd. configura- tiono). # in the real application, the tde1707 and as- sociated circuitry, can be significantly far away from the power supply and the long connection wires will act as a serial induc- tance. at power on, or at the turn-on of the power transistor, or in coincidence to load variations, this inductance will react to the current vari- ations with wide voltage variations. in proximity sensor applications, for space reasons, the size of the filtering capacitors has to be reduced as much as possible. the voltage oscillation can induce two kind of problems in the circuit:- 1)overvoltage on the +vs pin, connected to the +24v bus, that can exceed the tde1707 rated limit. 2)disturbances inside the circuit (tde1707), because the noise immunity level is exceeded with disruption of the input/output function. filtering the overvoltage on the +vs is possible AN495/0692 figure 1: block diagram 1/5
only by an external capacitance between +vs (pin7) and ground (pin4) to limit voltage spikes at the device's rated values. immunity problems in the circuit are essentially related to the +5 v vreg filtering, because the noise on this voltage can induce errors in the low- voltage circuits. the best solution, to avoid immunity problems, is to put the filter capacitor between vreg and ground even if the vreg dees not supply any ex- ternal circuits. compared to the +vs capacitor fil- tering effect, that also improves the immunity, the vreg capacitor offers two advantages: 1) the capacitive value can be significantly lower, for the same filtering effect, because the vreg filter does not have to sustain the load current variations. 2) the nominal voltage of the capacitor is lower (6 v instead of 25-50), so that the phisical size of the capacitor is also smaller. the higher effectiveness of filtering vreg instead of +vs is always evident. on average, in a typical application, a capacitor put on vreg can, with the same filtering effectiveness of a capacitor on +vs, be 20 times smaller in value. nonetheless, a capacitor on +vs, although not of high value, is recommended. its value shall be adapted in accordance to the equivalent induc- tance of the supply connections and of the value of the load. for instance, the values used in the test circuit (fig. 3) : 325 m h are too high to be found in pratice. 4.7nf on +vs are barely sufficient with 325 m h (with 325 m h, 10nf would be preferable). 4.7nf on vreg are sufficient in most of the pratical cases. using the test circuit shown in fig. 3, with the input trigger of the tde1707 in pulsed mode, the effect of the capacitor un vreg (pin 6) can be noted in diagrams fig. 4a and fig. 4b: - fig. 4a shows the voltage, on +vs (ch1) and vreg (ch2), at turn-on and turn-off edges, without the filter capacitor on pin 6. - fig. 4b shows the same signals but with 4.7 nf capacitor connected between vreg (pin 6) and ground. the improvement of the immunity level and the low values of the capacitors makes the suggested filtering solution the best for proximity detector ap- plication. figure 2: application circuit application note 2/5
figure 3 : test circuit figure 4a. 5v > 24v > ch2 ch1 < on off > delay cap. ground delay high side out low side out in v.reg out led out +vs 4.7nf input 50 4.7nf load 75 gnd. +25v 325 m h tde1707 6 17 8 2 4 5 3 ch1 20v/div t = 20 m s/div ch2 2v/div application note 3/5
figure 4b. 5v > 24v > < on off > ch1 20v/div t = 20 m s/div ch2 2v/div application note 4/5
information furnished is believed to be accurate and reliable. however, sgs-thomson microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of sgs-thomson microelectronics. specifications men- tioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. sgs-thomson microelectronics products are not authorized for use as critical components in life support devices or systems without ex- press written approval of sgs-thomson microelectronics. ? 1995 sgs-thomson microelectronics - all rights reserved sgs-thomson microelectronics group of companies australia - brazil - france - germany - hong kong - italy - japan - korea - malaysia - malta - morocco - the netherlands - singapore - spain - sweden - switzerland - taiwan - thaliand - united kingdom - u.s.a. application note 5/5
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